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1 ltc1148 ltc1148-3.3/ltc1148-5 high efficiency synchronous step-down switching regulators load current (a) 0.02 80 efficiency (%) 85 90 100 0.2 2 ltc1148 ?ta01 95 v in = 6v v in = 10v ltc1148-5 efficiency s f ea t u re d u escriptio n ultrahigh efficiency: over 95% possible n current-mode operation for excellent line and load transient response n high efficiency maintained over three decades of output current n low 160 m a standby current at light loads n logic controlled micropower shutdown: i q < 20 m a n wide v in range: 3.5v* to 20v n short-circuit protection n very low dropout operation: 100% duty cycle n synchronous fet switching for high efficiency n adaptive nonoverlap gate drives n output can be externally held high in shutdown n available in 14-pin narrow so package the ltc ? 1148 series is a family of synchronous step- down switching regulator controllers featuring automatic burst mode tm operation to maintain high efficiencies at low output currents. these devices drive external comple- mentary power mosfets at switching frequencies up to 250khz using a constant off-time current-mode architec- ture providing constant ripple current in the inductor. the operating current level is user-programmable via an external current sense resistor. wide input supply range allows operation from 3.5v* to 18v (20v maximum). constant off-time architecture provides low dropout regu- lation limited by only the r ds(on) of the external mosfet and resistance of the inductor and current sense resistor. the ltc1148 series combines synchronous switching for maximum efficiency at high currents with an automatic low current operating mode, called burst mode operation, which reduces switching losses. standby power is reduced to only 2mw at v in = 10v (at i out = 0). load currents in burst mode operation are typically 0ma to 300ma. for operation up to 48v input, see the ltc1149 and ltc1159 data sheets and application note 54. figure 1. high efficiency step-down converter u a o pp l ic at i ty p i ca l , ltc and lt are registered trademarks of linear technology corporation. burst mode is a trademark of linear technology corporation. * ltc1148l and ltc1148l-3.3 only. u s a o pp l ic at i n notebook and palmtop computers n portable instruments n battery-operated digital devices n cellular telephones n dc power distribution systems n gps systems 0v = normal >1.5v = shutdown p-channel si4431dy + 1 m f l* 62 m h r sense ** 0.05 w v out 5v/2a + c in 100 m f v in (5.2v to 18v) i th c t sgnd c t 470pf c c 3300pf r c 1k + c out 390 m f d1 mbrs140t3 lt1148 ?ta01 n-drive pgnd n-channel si4412dy v in p-drive ltc1148hv-5 shutdown sense + sense 1000pf coiltronics ctx62-2-mp krl sl-1-c1-0r050j * **
2 ltc1148 ltc1148-3.3/ltc1148-5 a u g w a w u w a r b s o lu t exi t i s order part number ltc1148cn ltc1148hvcn ltc1148cn-3.3 ltc1148hvcn-3.3 ltc1148cn-5 ltc1148hvcn-5 ltc1148cs ltc1148hvcs ltc1148lcs ltc1148cs-3.3 ltc1148hvcs-3.3 ltc1148lcs-3.3 ltc1148cs-5 ltc1148hvcs-5 wu u package / o rder i for atio consult factory for industrial and military grade parts. symbol parameter conditions min typ max units v 9 feedback voltage (ltc1148, ltc1148l, v in = 9v l 1.21 1.25 1.29 v ltc1148hv) i 9 feedback current (ltc1148, ltc1148l, l 0.2 1 m a ltc1148hv) v out regulated output voltage v in = 9v ltc1148-3.3, ltc1148hv-3.3, ltc1148l-3.3 i load = 700ma l 3.23 3.33 3.43 v ltc1148-5, ltc1148hv-5 i load = 700ma l 4.90 5.05 5.20 v d v out output voltage line regulation v in = 7v to 12v, i load = 50ma C 40 0 40 mv output voltage load regulation ltc1148-3.3, ltc1148hv-3.3, ltc1148l-3.3 5ma < i load < 2a l 40 65 mv ltc1148-5, ltc1148hv-5 5ma < i load < 2a l 60 100 mv output ripple (burst mode) i load = 0a 50 mv p-p i q input dc supply current (note 3) (note 7) ltc1148 series normal mode 4v < v in < 12v 1.6 2.1 ma sleep mode 4v < v in < 12v 160 230 m a sleep mode (ltc1148-5) 6v < v in < 12v 160 230 m a shutdown v shutdown = 2.1v, 4v < v in < 12v 10 20 m a ltc1148hv series normal mode 4v < v in < 18v 1.6 2.3 ma sleep mode 4v < v in < 18v 160 250 m a sleep mode (ltc1148hv-5) 6v < v in < 18v 160 250 m a shutdown v shutdown = 2.1v, 4v < v in < 18v 10 22 m a ltc1148l series normal mode 3.5v < v in < 12v 1.6 2.1 ma sleep mode 3.5v < v in < 12v 160 230 m a shutdown v shutdown = 2.1v, 3.5v < v in < 12v 10 20 m a t a = 25 c, v in = 10v, v shutdown = 0v unless otherwise noted. e lectr ic al c c hara terist ics 1 2 3 4 5 6 7 top view s package 14-lead plastic so n package 14-lead pdip 14 13 12 11 10 9 8 p-drive nc v in c t intv cc i th sense n-drive nc pgnd sgnd shutdown v fb * sense + *fixed output versions = nc t jmax = 125 c, q ja = 70 c/ w (n) t jmax = 125 c, q ja = 110 c/ w (s) (note 1) input supply voltage (pin 3) ltc1148 and ltc1148l series ............ 16v to C 0.3v ltc1148hv series ............................... 20v to C 0.3v continuous output current (pins 1, 14) .............. 50ma sense voltages (pins 7, 8) ltc1148hv (adjustable only) v in 3 12.7v ...................................... 13v to C 0.3v v in < 12.7v ......................... (v in + 0.3v) to C 0.3v operating ambient temperature range ...... 0 c to 70 c extended commercial temperature range ............................... C 40 c to 85 c junction temperature (note 2) ............................ 125 c storage temperature range ................ C 65 c to 150 c lead temperature (soldering, 10 sec)................. 300 c
3 ltc1148 ltc1148-3.3/ltc1148-5 t a = 25 c, v in = 10v, v shutdown = 0v, unless otherwise noted. e lectr ic al c c hara terist ics symbol parameter conditions min typ max units v 8 C v 7 current sense threshold voltage ltc1148, ltc1148hv, ltc1148l v sense C = 5v, v 9 = v out /4 + 25mv (forced) 25 mv v sense C = 5v, v 9 = v out /4 C 25mv (forced) l 130 150 170 mv ltc1148-3.3, ltc1148hv-3.3 v sense C = v out + 100mv (forced) 25 mv ltc1148l-3.3 v sense C = v out C 100mv (forced) l 130 150 170 mv ltc1148-5, ltc1148hv-5 v sense C = v out + 100mv (forced) 25 mv v sense C = v out C 100mv (forced) l 130 150 170 mv v 10 shutdown pin threshold 0.5 0.8 2 v i 10 shutdown pin input current 0v < v shutdown < 8v, v in = 16v 1.2 5 m a i 4 c t pin discharge current v out in regulation, v sense C = v out 50 70 90 m a v out = 0v 2 10 m a t off off time (note 5) c t = 390pf, i load = 700ma 4 5 6 m s t r , t f driver output transition times c l = 3000pf (pins 1, 14), v in = 6v 100 200 ns symbol parameter conditions min typ max units v 9 feedback voltage (ltc1148, ltc1148hv v in = 9v 1.20 1.25 1.30 v ltc1148l) d v out regulated output voltage v in = 9v ltc1148-3.3, ltc1148hv-3.3, ltc1148l-3.3 i load = 700ma 3.17 3.33 3.43 v ltc1148-5, ltc1148hv-5 i load = 700ma 4.85 5.05 5.20 v i q input dc supply current (note 3) (note 7) ltc1148 series normal mode 4v < v in < 12v 1.6 2.4 ma sleep mode 4v < v in < 12v 160 260 m a sleep mode 6v < v in < 12v 160 260 m a shutdown v shutdown = 2.1v, 4v < v in < 12v 10 22 m a ltc1148hv series normal mode 4v < v in < 18v 1.6 2.6 ma sleep mode 4v < v in < 18v 160 280 m a sleep mode 6v < v in < 18v 160 280 m a shutdown v shutdown = 2.1v, 4v < v in < 18v 10 24 m a ltc1148l series normal mode 3.5v < v in < 12v 1.6 2.4 ma sleep mode 3.5v < v in < 12v 160 260 m a shutdown v shutdown = 2.1v, 3.5v < v in < 12v 10 22 m a v 8 C v 7 current sense threshold voltage ltc1148, ltc1148hv, ltc1148l (note 4) v sense C = 5v, v 9 = v out /4 C 25mv (forced) 25 mv v sense C = 5v, v 9 = v out /4 + 25mv (forced) 125 150 175 mv ltc1148-3.3, ltc1148hv-3.3, ltc1148l-3.3 v sense C = v out + 100mv (forced) 25 mv v sense C = v out C 100mv (forced) 125 150 175 mv ltc1148-5, ltc1148hv-5 v sense C = v out + 100mv (forced) 25 mv v sense C = v out C 100mv (forced) 125 150 175 mv v 10 shutdown pin threshold 0.55 0.8 2 v t off off time (note 5) c t = 390pf, i load = 700ma 3.8 5 6 m s C40 c t a 85 c (note 5), v in = 10v, unless otherwise noted.
4 ltc1148 ltc1148-3.3/ltc1148-5 e lectr ic al c c hara terist ics the l denotes specifications which apply over the full operating temperature range. note 1: absolute maximum ratings are those values beyond which the life of a device may be impaired. note 2: t j is calculated from the ambient temperature t a and power dissipation p d according to the following formulas: ltc1148cn, ltc1148cn-3.3, ltc1148cn-5: t j = t a + (p d 70 c/w) ltc1148cs, ltc1148cs-3.3, ltc1148cs-5: t j = t a + (p d 110 c/w) note 3: dynamic supply current is higher due to the gate charge being delivered at the switching frequency. see applications information. note 4: the ltc1148 and ltc1148hv versions are tested with external feedback resistors resulting in a nominal output voltage of 5v. the ltc1148l version is tested with external feedback resistors resulting in a nominal output voltage of 2.5v. note 5: in applications where r sense is placed at ground potential, the off time increases approximately 40%. note 6: the ltc1148, ltc1148hv and ltc1148l series are not tested and not quality assurance sampled at C40 c and 85 c. these specifications are guaranteed by design and/or correlation. note 7: the ltc1148l and ltc1148l-3.3 allow operation to v in = 3.5v. cc hara terist ics uw a t y p i ca lper f o r c e line regulation efficiency vs input voltage load current (a) 0 100 d v out (mv) ?0 ?0 ?0 ?0 0 20 0.5 1 1.5 2 ltc1148 ?tpc03 2.5 figure 1 circuit r sense = 0.05 w v in = 6v v in = 12v input voltage (v) 0 80 efficiency (%) 82 86 88 90 100 94 4 8 ltc1148 ?tpc01 84 96 98 92 12 16 20 i load = 100ma figure 1 circuit i load = 1a dc supply current supply current in shutdown load regulation operating frequency vs (v in C v out ) (v in ?v out ) voltage (v) 0 normalized frequency 0.6 1.0 8 ltc1148 ?tpc06 0.4 0 2 4 6 0.2 1.2 0.8 10 12 1.4 1.6 v out = 5v 0? 70? 25? input voltage 0 0 supply current (ma) 0.3 0.9 1.2 1.5 4 ltc1148 ?tpc04 0.6 26 1.8 2.1 8 10 12 14 16 18 sleep mode active mode not including gate charge current 20 input voltage (v) 0 0 supply current ( m a) 2 6 8 10 20 14 4 8 10 18 ltc1148 ?tpc05 4 16 18 12 26 12 14 16 v shutdown = 2v 20 input voltage (v) 0 d v out (mv) 0 10 20 16 ltc1148 ?tpc02 ?0 ?0 ?0 4 812 ?0 40 30 figure 1 circuit i load = 1a 20
5 ltc1148 ltc1148-3.3/ltc1148-5 cc hara terist ics uw a t y p i ca lper f o r c e current sense threshold voltage temperature (?) 0 0 sense voltage (mv) 25 50 75 175 125 20 40 150 100 60 80 100 maximum threshold minimum threshold ltc1148 ?tpc09 off time vs v out output voltage (v) 0 off time ( m s) 40 50 60 4 ltc1148 ?tpc08 30 20 0 1 23 10 80 70 5 ltc1148-5 ltc1148-3.3 v sense ? = v out gate charge supply current operating frequency (khz) 20 0 gate charge current (ma) 4 8 12 28 20 80 140 24 16 200 260 q n + q p = 100nc q n + q p = 50nc ltc1148 ?tpc07 p-drive (pin 1): high current drive for top p-channel mosfet. voltage swing at this pin is from v in to ground. nc (pin 2): no connection. can connect to power ground. v in (pin 3): main supply pin. must be closely decoupled to power ground pin 12. c t (pin 4): external capacitor c t from pin 4 to ground sets the operating frequency. the actual frequency is also dependent upon the input voltage. intv cc (pin 5): internal supply voltage, nominally 3.3v. can be decoupled to signal ground. do not externally load this pin. i th (pin 6): gain amplifier decoupling point. the current comparator threshold increases with the pin 6 voltage. sense C (pin 7): connects to internal resistive divider which sets the output voltage in ltc1148-3.3 and ltc1148-5 versions. pin 7 is also the (C) input for the current comparator. sense + (pin 8): the (+) input to the current comparator. a built-in offset between pins 7 and 8 in conjunction with r sense sets the current trip threshold. v fb (pin 9): for the ltc1148 adjustable version, pin 9 serves as the feedback pin from an external resistive divider used to set the output voltage. on ltc1148-3.3 and ltc1148-5 versions this pin is not used. shutdown (pin 10): when grounded, the ltc1148 series operates normally. pulling pin 10 high holds both mosfets off and puts the ltc1148 series in micropower shutdown mode. requires cmos logic signal with t r , t f < 1 m s, should not be left floating. sgnd (pin 11): small-signal ground. must be routed separately from other grounds to the (C) terminal of c out . pgnd (pin 12): driver power ground. connects to source of n-channel mosfet and the (C) terminal of c in . nc (pin 13): no connection. can connect to power ground. n-drive (pin 14): high current drive for bottom n-channel mosfet. voltage swing at pin 14 is from ground to v in . pi fu ctio s u uu
6 ltc1148 ltc1148-3.3/ltc1148-5 + 1 p-drive 14 3v in 12 pgnd n-drive r s q + c 25mv to 150mv 6 13k i th 1.25v 10 5 reference + shutdown intv cc v os + v g 8 sense + 9 adjustable version v fb 100k 5pf + v th1 t + v th2 s sleep 11 sgnd 4 c t off-time control v in sense v fb sense 7 ltc1148 ?fd fu ctio al diagra u uw pin 9 connection shown for ltc1148-3.3 and ltc1148-5; changes create ltc1148. test circuit + 1 2 3 4 5 6 7 14 13 12 11 10 9 8 p-drive nc v in c t intv cc i th sense n-drive nc pgnd sgnd shutdown nc (v fb ) sense + 1000pf v 7 to v 8 + v 10 r sense 0.05 w 75k 25k 100pf + v out 440 m f 50 m h 1 m f irfz34 1n5818 330 m f + irf9z34 + v in + v 7 1k 3300pf 10nf 390pf ltc1148 +
7 ltc1148 ltc1148-3.3/ltc1148-5 operatio u the ltc1148 series uses a current mode, constant off- time architecture to synchronously switch an external pair of complementary power mosfets. operating fre- quency is set by an external capacitor at the timing capacitor pin 4. the output voltage is sensed by an internal voltage divider connected to sense C pin 7 (ltc1148-3.3 and ltc1148-5) or external divider returned to v fb pin 9 (ltc1148). a voltage comparator v, and a gain block g, compare the divided output voltage with a reference voltage of 1.25v. to optimize efficiency, the ltc1148 series automatically switches between two modes of operation, burst and continuous. the voltage compara- tor is the primary control element when the device is in burst mode operation, while the gain block controls the output voltage in continuous mode. during the switch on cycle in continuous mode, current comparator c monitors the voltage between pins 7 and 8 connected across an external shunt in series with the inductor. when the voltage across the shunt reaches its threshold value, the p-drive output is switched to v in , turning off the p-channel mosfet. the timing capacitor connected to pin 4 is now allowed to discharge at a rate determined by the off-time controller. the discharge cur- rent is made proportional to the output voltage (measured by pin 7) to model the inductor current, which decays at a rate which is also proportional to the output voltage. while the timing capacitor is discharging, the n-drive output goes to v in , turning on the n-channel mosfet. when the voltage on the timing capacitor has discharged past v th1 , comparator t trips, setting the flip- flop. this causes the n-drive output to go low (turning off the n- channel mosfet) and the p-drive output to also go low (turning the p-channel mosfet back on). the cycle then repeats. as the load current increases, the output voltage de- creases slightly. this causes the output of the gain stage (pin 6) to increase the current comparator threshold, thus tracking the load current. the sequence of events for burst mode operation is very similar to continuous operation with the cycle interrupted by the voltage comparator. when the output voltage is at or above the desired regulated value, the p-channel mosfet is held off by comparator v and the timing capacitor continues to discharge below v th1 . when the timing capacitor discharges past v th2 , voltage comparator s trips, causing the internal sleep line to go low and the n- channel mosfet to turn off. the circuit now enters sleep mode with both power mosfets turned off. in sleep mode, a majority of the circuitry is turned off, dropping the quiescent current from 1.6ma to 160 m a. the load current is now being supplied from the output capacitor. when the output voltage has dropped by the amount of hysteresis in comparator v, the p-channel mosfet is again turned on and the process repeats. to avoid the operation of the current loop interfering with burst mode operation, a built-in offset (v os ) is incorpo- rated in the gain stage. this prevents the current compara- tor threshold from increasing until the output voltage has dropped below a minimum threshold. to prevent both the external mosfets from ever being turned on at the same time, feedback is incorporated to sense the state of the driver output pins. before the n-drive output can go high, the p-drive output must also be high. likewise, the p-drive output is prevented from going low while the n-drive output is high. using constant off-time architecture, the operating fre- quency is a function of the input voltage. to minimize the frequency variation as dropout is approached, the off-time controller increases the discharge current as v in drops below v out + 1.5v. in dropout the p-channel mosfet is turned on continuously (100% duty cycle), providing extremely low dropout operation.
8 ltc1148 ltc1148-3.3/ltc1148-5 applicatio s i for atio w uu u the basic ltc1148 series application circuit (fixed output versions) is shown in figure 1. external compo- nent selection is driven by the load requirement, and begins with the selection of r sense . once r sense is known, c t and l can be chosen. next, the power mosfets and d1 are selected. finally, c in and c out are selected and the loop is compensated. the circuit shown in figure 1 can be configured for operation up to an input voltage of 20v. if the application requires higher input voltage, then the ltc1149 or ltc1159 should be used. r sense selection for output current r sense is chosen based on the required output current. the ltc1148 series current comparator has a threshold range which extends from a minimum of 25mv/r sense to a maximum of 150mv/r sense . the current comparator threshold sets the peak of the inductor ripple current, yielding a maximum output current i max equal to the peak value less half the peak-to-peak ripple current. for proper burst mode operation, i ripple(p-p) must be less than or equal to the minimum current comparator threshold. since efficiency generally increases with ripple current, the maximum allowable ripple current is assumed, i.e., i ripple(p-p) = 25mv/r sense (see c t and l selection for operating frequency). solving for r sense and allowing a margin for variations in the ltc1148 series and external component values yields: r sense = 100mv i max a graph for selecting r sense versus maximum output current is given in figure 2. the load current below which burst mode operation com- mences (i burst ) and the peak short-circuit current (i sc(pk) ) both track i max . once r sense has been chosen, i burst and i sc(pk) can be predicted from the following: i burst ? 15mv r sense i sc(pk) = 150mv r sense figure 2. selecting r sense maximum output current (a) 0 r sense ( w ) 0.15 0.20 4 ltc1148 ?f02 0.10 0.05 0 1 2 3 5 the ltc1148 series automatically extends t off during a short circuit to allow sufficient time for the inductor current to decay between switch cycles. the resulting ripple current causes the average short-circuit current i sc(avg) to be reduced to approximately i max . l and c t selection for operating frequency the ltc1148 series uses a constant off-time architecture with t off determined by an external timing capacitor c t . each time the p-channel mosfet switch turns on, the voltage on c t is reset to approximately 3.3v. during the off time, c t is discharged by a current which is proportional to v out . the voltage on c t is analogous to the current in inductor l, which likewise decays at a rate proportional to v out . thus the inductor value must track the timing capacitor value. the value of c t is calculated from the desired continuous mode operating frequency, f: c t = 1 2.6(10 4 )f assumes v in = 2v out , figure 1 circuit. a graph for selecting c t versus frequency including the effects of input voltage is given in figure 3. as the operating frequency is increased the gate charge losses will be higher, reducing efficiency (see efficiency considerations). the complete expression for operating frequency of the circuit in figure 1 is given by:
9 ltc1148 ltc1148-3.3/ltc1148-5 applicatio s i for atio w uu u inductor core selection once the minimum value for l is known, the type of inductor must be selected. the highest efficiency will be obtained using ferrite, kool m m ? on molypermalloy (mpp) cores. lower cost powdered iron cores provide suitable performance but cut efficiency by 3% to 7%. actual core loss is independent of core size for a fixed inductor value, but it is very dependent on inductance selected. as induc- tance increases, core losses go down. unfortunately, increased inductance requires more turns of wire and therefore copper losses increase. ferrite designs have very low core loss, so design goals can concentrate on copper loss and preventing saturation. ferrite core material saturates hard, which means that inductance collapses abruptly when the peak design cur- rent is exceeded. this results in an abrupt increase in inductor ripple current and consequent output voltage ripple which can cause burst mode operation to be falsely triggered. do not allow the core to saturate! kool m m (from magnetics, inc.) is a very good, low loss core material for toroids, with a soft saturation charac- teristic. molypermalloy is slightly more efficient at high (>200khz) switching frequencies, but quite a bit more expensive. toroids are very space efficient, especially when you can use several layers of wire. because they generally lack a bobbin, mounting is more difficult. how- ever, new designs for surface mount are available from coiltronics and beckman industrial corp. which do not increase the height significantly. power mosfet and d1 selection two external power mosfets must be selected for use with the ltc1148 series: a p-channel mosfet for the main switch, and an n-channel mosfet for the synchro- nous switch. the main selection criteria for the power mosfets are the threshold voltage v gs(th) and on resis- tance r ds(on) . the minimum input voltage determines whether standard threshold or logic-level threshold mosfets must be used. for v in > 8v, standard threshold mosfets (v gs(th) < 4v) may be used. if v in is expected to drop below 8v, logic- frequency (khz) 0 0 capacitance (pf) 200 400 600 100 200 ltc1148 ?f03 800 1000 300 v sense = v out = 5v v in = 12v v in = 10v v in = 7v figure 3. timing capacitor value f = 1 t off ) ) 1 v out v in where: t off = 1.3(10 4 )c t ) ) v reg v out v reg is the desired output voltage (i.e., 5v, 3.3v). v out is the measured output voltage. thus v reg /v out = 1 in regulation. note that as v in decreases, the frequency decreases. when the input to output voltage differential drops below 1.5v, the ltc1148 series reduces t off by in- creasing the discharge current in c t . this prevents audible operation prior to dropout. once the frequency has been set by c t , the inductor l must be chosen to provide no more than 25mv/r sense of peak-to-peak inductor ripple current. this results in a minimum required inductor value of: l min = 5.1(10 5 )r sense (c t )v reg as the inductor value is increased from the minimum value, the esr requirements for the output capacitor are eased at the expense of efficiency. if too small an inductor is used, the inductor current will decrease past zero and change polarity. a consequence of this is that the ltc1148 series may not enter burst mode operation and efficiency will be severely degraded at low currents. kool m m is a registered trademark of magnetics, inc.
10 ltc1148 ltc1148-3.3/ltc1148-5 applicatio s i for atio w uu u level threshold mosfets (v gs(th) < 2.5v) are strongly recommended. the ltc1148/ltc1148hv series supply voltage must always be less than the absolute maximum v gs ratings for the mosfets. the maximum output current i max determines the r ds(on) requirement for the two mosfets. when the ltc1148 series is operating in continuous mode, the simplifying assumption can be made that one of the two mosfets is always conducting the average load current. the duty cycles for the two mosfets are given by: p-ch duty cycle = v out v in n-ch duty cycle = (v in ?v out ) v in from the duty cycles the required r ds(on) for each mos- fet can be derived: p-ch r ds(on) = v in (p p ) v out (i max 2 )(1 + d p ) n-ch r ds(on) = v in (p n ) (v in ?v out )(i max 2 )(1 + d n ) where p p and p n are the allowable power dissipations and d p and d n are the temperature dependencies of r ds(on) . p p and p n will be determined by efficiency and/or thermal requirements (see efficiency considerations). (1 + d) is generally given for a mosfet in the form of a normalized r ds(on) vs temperature curve, but d = 0.007/ c can be used as an approximation for low voltage mosfets. the schottky diode d1 shown in figure 1 only conducts during the dead-time between the conduction of the two power mosfets. d1s sole purpose in life is to prevent the body diode of the n-channel mosfet from turning on and storing charge during the dead time, which could cost as much as 1% in efficiency (although there are no other harmful effects if d1 is omitted). therefore, d1 should be selected for a forward voltage of less than 0.7v when conducting i max . c in and c out selection in continuous mode, the source of the p-channel mosfet is a square wave of duty cycle v out /v in . to prevent large voltage transients, a low esr input capacitor sized for the maximum rms current must be used. the maximum rms capacitor current is given by: c in required i rms ? i max [v out (v in v out )] 1/2 v in this formula has a maximum at v in = 2v out , where i rms = i out /2. this simple worst-case condition is com- monly used for design because even significant devia- tions do not offer much relief. note that capacitor manufacturers ripple current ratings are often based on only 2000 hours of life. this makes it advisable to further derate the capacitor, or to choose a capacitor rated at a higher temperature than required. always consult the manufacturer if there is any question. an additional 0.1 m f to 1 m f ceramic capacitor is also required on v in pin 3 for high frequency decoupling. the selection of c out is driven by the required effective series resistance (esr). the esr of c out must be less than twice the value of r sense for proper operation of the ltc1148 series: c out required esr < 2r sense optimum efficiency is obtained by making the esr equal to r sense . as the esr is increased up to 2r sense , the efficiency degrades by less than 1%. if the esr is greater than 2r sense , the voltage ripple on the output capacitor will prematurely trigger burst mode operation, resulting in disruption of continuous mode and an efficiency hit which can be several percent. manufacturers such as nichicon and united chemicon should be considered for high performance capacitors. the os-con semiconductor dielectric capacitor available from sanyo has the lowest esr/size ratio of any aluminum electrolytic at a somewhat higher price. once the esr requirement for c out has been met, the rms current rating generally far exceeds the i ripple(p-p) requirement.
11 ltc1148 ltc1148-3.3/ltc1148-5 applicatio s i for atio w uu u in surface mount applications multiple capacitors may have to be paralleled to meet the capacitance, esr, or rms current handling requirements of the application. aluminum electrolytic and dry tantalum capacitors are both available in surface mount configurations. in the case of tantalum, it is critical that the capacitors are surge tested for use in switching power supplies. an excellent choice is the avx tps series of surface mount tantalums, available in case heights ranging from 2mm to 4mm. for example, if 200 m f/10v is called for in an application requiring 3mm height, two avx 100 m f/10v (p/n tpsd 107k010) could be used. consult the manufacturer for other specific recommendations. at low supply voltages, a minimum capacitance at c out is needed to prevent an abnormal low frequency oper- ating mode (see figure 4). when c out is made too small, the output ripple at low frequencies will be large enough to trip the voltage comparator. this causes burst mode operation to be activated when the ltc1148 series would normally be in continuous operation. the effect is most pronounced with low values of r sense and can be improved by operating at higher frequencies with lower values of l. the output remains in regulation at all times. several cycles to respond to a step in dc (resistive) load current. when a load step occurs, v out shifts by an amount equal to d i load ? esr, where esr is the effective series resistance of c out . d i load also begins to charge or discharge c out until the regulator loop adapts to the current change and returns v out to its steady state value. during this recovery time v out can be monitored for overshoot or ringing which would indicate a stability problem. the pin 6 external components shown in the figure 1 circuit will prove adequate compensation for most applications. a second, more severe transient is caused by switching in loads with large (>1 m f) supply bypass capacitors. the discharged bypass capacitors are effectively put in parallel with c out , causing a rapid drop in v out . no regulator can deliver enough current to prevent this problem if the load switch resistance is low and it is driven quickly. the only solution is to limit the rise time of the switch drive so that the load rise time is limited to approximately 25 ? c load . thus a 10 m f capacitor would require a 250 m s rise time, limiting the charging current to about 200ma. efficiency considerations the percent efficiency of a switching regulator is equal to the output power divided by the input power times 100%. it is often useful to analyze individual losses to determine what is limiting the efficiency and which change would produce the most improvement. percent efficiency can be expressed as: %efficiency = 100% C (l1 + l2 + l3 + ...) where l1, l2, etc., are the individual losses as a percent- age of input power. (for high efficiency circuits only small errors are incurred by expressing losses as a percentage of output power). although all dissipative elements in the circuit produce losses, three main sources usually account for most of the losses in ltc1148 series circuits: 1) ltc1148 dc bias current, 2) mosfet gate charge current, and 3) i 2 r losses. 1. the dc supply current is the current which flows into v in pin 3 less the gate charge current. for v in = 10v the checking transient response the regulator loop response can be checked by looking at the load transient response. switching regulators take (v in ?v out ) voltage (v) 0 c out ( m f) 600 1000 4 ltc1148 ?f04 400 200 0 1 2 3 5 800 l = 50 m h r sense = 0.02 w l = 25 m h r sense = 0.02 w l = 50 m h r sense = 0.05 w figure 4. minimum value of c out
12 ltc1148 ltc1148-3.3/ltc1148-5 applicatio s i for atio w uu u ltc1148 dc supply current is 160 m a for no load, and increases proportionally with load up to a constant 1.6ma after the ltc1148 series has entered continu- ous mode. because the dc bias current is drawn from v in , the resulting loss increases with input voltage. for v in = 10v the dc bias losses are generally less than 1% for load currents over 30ma. however, at very low load currents the dc bias current accounts for nearly all of the loss. 2. mosfet gate charge current results from switching the gate capacitance of the power mosfets. each time a mosfet gate is switched from low to high to low again, a packet of charge dq moves from v in to ground. the resulting dq/dt is a current out of v in which is typically much larger than the dc supply current. in continuous mode, i gatechg = f (q n + q p ). the typical gate charge for a 0.1 w n-channel power mosfet is 25nc, and for a p-channel about twice that value. this results in i gatechg = 7.5ma in 100khz continuous operation, for a 2% to 3% typical mid-current loss with v in = 10v. note that the gate charge loss increases directly with both input voltage and operating frequency. this is the principal reason why the highest efficiency circuits operate at moderate frequencies. furthermore, it ar- gues against using larger mosfets than necessary to control i 2 r losses, since overkill can cost efficiency as well as money! 3. i 2 r losses are easily predicted from the dc resistances of the mosfet, inductor, and current shunt. in continu- ous mode the average output current flows through l and r sense , but is chopped between the p-channel and n-channel mosfets. if the two mosfets have approximately the same r ds(on) , then the resistance of one mosfet can simply be summed with the resis- tances of l and r sense to obtain i 2 r losses. for example, if each r ds(on) = 0.1 w , r l = 0.15 w , and r sense = 0.05 w , then the total resistance is 0.3 w . this results in losses ranging from 3% to 12% as the output current increases from 0.5a to 2a. i 2 r losses cause the efficiency to roll-off at high output currents. figure 5 shows how the efficiency losses in a typical ltc1148 series regulator end up being apportioned. figure 5. efficiency loss output current (a) 0.01 efficiency/loss (%) 90 95 1 ltc1148 ?f05 85 80 0.03 0.1 0.3 3 100 gate charge ltc1148 i q i 2 r the gate charge loss is responsible for the majority of the efficiency lost in the mid-current region. if burst mode operation was not employed at low currents, the gate charge loss alone would cause efficiency to drop to unacceptable levels. with burst mode operation, the dc supply current represents the lone (and unavoid- able) loss component which continues to become a higher percentage as output current is reduced. as expected, the i 2 r losses dominate at high load currents. other losses including c in and c out esr dissipative losses, mosfet switching losses, schottky conduction losses during dead time, and inductor core losses, gener- ally account for less than 2% total additional loss. design example as a design example, assume v in = 12v (nominal), v out = 5v, i max = 2a, and f = 200khz; r sense , c t and l can immediately be calculated: r sense = 100mv/2 = 0.05 w t off = (1/200khz)[1 C (5/12)] = 2.92 m s c t = 2.92 m s/[(1.3)(10 4 )] = 220pf l min = 5.1 ( 10 5 )0.05 w (220pf)5v = 28 m h assume that the mosfet dissipations are to be limited to p n = p p = 250mw. if t a = 50 c and the thermal resistance of each mosfet is 50 c/ w, then the junction temperatures will be 63 c
13 ltc1148 ltc1148-3.3/ltc1148-5 applicatio s i for atio w uu u to prevent stray pickup a 100pf capacitor is suggested across r1 located close to the ltc1148. for figure 1 applications with v out below 2v, or when r sense is moved to ground, the current sense comparator inputs operate near ground. when the current comparator is operated at less than 2v common mode, the off time increases approximately 40%, requiring the use of a smaller timing capacitor c t . auxiliary windings C suppressing burst mode operation the ltc1148 synchronous switch removes the normal limitation that power must be drawn from the inductor primary winding in order to extract power from auxil- iary windings. with synchronous switching, auxiliary outputs may be loaded without regard to the primary output load, providing that the loop remains in continu- ous mode operation. burst mode operation can be suppressed at low output currents with a simple external network which cancels the 25mv minimum current comparator threshold. this tech- nique is also useful for eliminating audible noise from certain types of inductors in high current (i out > 5a) applications when they are lightly loaded. an external offset is put in series with the sense C pin to subtract from the built-in 25mv offset. an example of this technique is shown in figure 6. two 100 w resistors are inserted in series with the leads from the sense resistor. and d p = d n = 0.007(63 C 25) = 0.27. the required r ds(on) for each mosfet can now be calculated: p-ch r ds(on) = 12(0.25) 5(2) 2 (1.27) = 0.12 w n-ch r ds(on) = 12(0.25) 7(2) 2 (1.27) = 0.085 w the p-channel requirement can be met by a si9430dy, while the n-channel requirement is exceeded by a si9410dy. note that the most stringent requirement for the n-channel mosfet is with v out = 0 (i.e., short circuit). during a continuous short circuit, the worst-case n-channel dissipation rises to: p n = i sc(avg) 2 (r ds(on) )(1 + d n ) with the 0.05 w sense resistor i sc(avg) = 2a will result, increasing the 0.085 w n-channel dissipation to 450mw at a die temperature of 73 c. c in will require an rms current rating of at least 1a at temperature, and c out will require an esr of 0.05 w for optimum efficiency. now allow v in to drop to its minimum value. at lower input voltages the operating frequency will decrease and the p-channel will be conducting most of the time, causing its power dissipation to increase. at v in(min) = 7v: f min = (1/2.92 m s)[1 C (5v/7v)] = 98khz p p = 5v(0.12 w )(2a) 2 (1.27) 7v = 435mw this last step is necessary to assure that the power dissipation and junction temperature of the p-channel are not exceeded. ltc1148 adjustable applications when an output voltage other than 3.3v or 5v is required, the ltc1148 adjustable version is used with an external resistive divider from v out to v fb pin 9 (see figure 9). the regulated voltage is determined by: v out = 1.25 ) ) 1 + r2 r1 figure 6. suppression of burst mode operation r sense 1000pf r2 100 w r1 100 w r3 + c out v out sense + (pin 8) sense (pin 7) ltc1148 ?f06
14 ltc1148 ltc1148-3.3/ltc1148-5 applicatio s i for atio w uu u with the addition of r3, a current is generated through r1 causing an offset of: v offset = v out ) ) r1 r1 + r3 if v offset > 25mv, the minimum threshold will be can- celled and burst mode operation is prevented from occur- ring. since v offset is constant, the maximum load current is also decreased by the same offset. thus, to get back to the same i max , the value of the sense resistor must be lower: r sense ? 75mv i max to prevent noise spikes from erroneously tripping the current comparator, a 1000pf capacitor is needed across pins 7 and 8. output crowbar an added feature to using an n-channel mosfet as the synchronous switch is the ability to crowbar the output with the same mosfet. pulling the timing capacitor pin 4 above 1.5v when the output voltage is greater than the desired regulated value will turn on the n-channel mosfet. a fault condition which causes the output voltage to go above a maximum allowable value can be detected by external circuitry. turning on the n-channel mosfet when this fault is detected will cause large currents to flow and blow the system fuse. the n-channel mosfet needs to be sized so it will safely handle this overcurrent condition. the typical delay from pulling the c t pin high and the n drive pin 14 going high is 250ns. note: under shutdown conditions, the n-chan- nel is held off and pulling the c t pin high will not cause the n-channel mosfet to crowbar the output. a simple n-channel fet can be used as an interface between the overvoltage detect circuitry and the ltc1148 as shown in figure 7. figure 7. output crowbar interface ltc1148 intv cc c t vn2222ll 5 4 from crowbar detect circuit (active when v gate = v in off when v gate = ground) ltc1148 ?f07 troubleshooting hints since efficiency is critical to ltc1148 series applications, it is very important to verify that the circuit is functioning correctly in both continuous and burst mode operation. the waveform to monitor is the voltage on the timing capacitor pin 4. in continuous mode (i load > i burst ) the voltage on the c t pin should be a sawtooth with a 0.9v p-p swing. this voltage should never dip below 2v as shown in figure 8a. when load currents are low (i load < i burst ) burst mode operation should occur with the c t pin waveform periodi- cally falling to ground as shown in figure 8b. 3.3v 0v (a) continuous mode operation 3.3v 0v (b) burst mode operation ltc1148 ?f08 figure 8. c t waveforms if pin 4 is observed falling to ground at high output currents, it indicates poor decoupling or improper ground- ing. refer to the board layout checklist.
15 ltc1148 ltc1148-3.3/ltc1148-5 board layout checklist when laying out the printed circuit board, the following checklist should be used to ensure proper operation of the ltc1148 series. these items are also illustrated graphi- cally in the layout diagram of figure 9. check the following in your layout: 1. are the signal and power grounds segregated? the ltc1148 signal ground pin 11 must return to the (C) plate of c out . the power ground returns to the source of the n-channel mosfet, anode of the schottky diode, and (C) plate of c in , which should have as short lead lengths as possible. 2. does the ltc1148 sense C pin 7 connect to a point close to r sense and the (+) plate of c out ? in adjust- able applications, the resistive divider r1, r2 must be connected between the (+) plate of c out and signal ground. 3. are the sense C and sense + leads routed together with minimum pc trace spacing? the 1000pf capacitor between pins 7 and 8 should be as close as possible to the ltc1148. 4. does the (+) plate of c in connect to the source of the p-channel mosfet as closely as possible? this capaci- tor provides the ac current to the p-channel mosfet. 5. is the 1 m f v in decoupling capacitor connected closely between pin 3 and power ground pin 12? this capacitor carries the mosfet driver peak currents. 6. is the shutdown pin 10 actively pulled to ground during normal operation? the shutdown pin is high imped- ance and must not be allowed to float. figure 9. ltc1148 layout diagram (see board layout checklist) applicatio s i for atio w uu u 1 2 3 4 5 6 7 14 13 12 11 10 9 8 c out 1 m f d1 p-channel 1k 3300pf 10nf c t ltc1148 r1 r2 + r sense n-channel + c in l + + v out v in output divider required with adjustable version only bold lines indicate high current paths ltc1148 ?f09 shutdown 1000pf p-drive v in c t intv cc i th sense n-drive pgnd sgnd shdn nc (v fb ) sense + nc nc +
16 ltc1148 ltc1148-3.3/ltc1148-5 typical applicatio s u 1 2 3 4 5 6 7 14 13 12 11 10 9 8 p-drive nc v in c t intv cc i th sense n-drive nc pgnd sgnd shutdown v fb sense + ltc1148 1 m f 0.01 m f r sense ** 0.033 w shutdown *l 50 m h irf7201 d1 mbrs140t3 + v in 8v to 14v + c out 220 m f 10v 2 os-con v out 5v/3a c c 3300pf r c 220 w c t 390pf *coiltronics ctx50-2-mp **krl sl-1-c1-0r033j ltc1148 ?f12 10nf irf7204 c in 330 m f 20v 100pf r1 10k 1% r2 30k 1% () v out = 1 + r2 r1 1.25v values shown for v out = 5v + 1 2 3 4 5 6 7 14 13 12 11 10 9 8 p-drive nc v in c t intv cc i th sense n-drive nc pgnd sgnd shutdown nc sense + ltc1148hv-3.3 1 m f 1000pf r sense ** 0.1 w shutdown *l 50 m h d1 mbrs140t3 1/2 si4532 1/2 si4532 + c in 100 m f 25v v in 4v to 18v + c out 220 m f 10v os-con v out 3.3v/1a c c 3300pf r c 1k c t 300pf *coiltronics ctx50-4 kool m m core **irc lr2010-01-r100-g ltc1148 ?f11 + 1 2 3 4 5 6 7 14 13 12 11 10 9 8 p-drive nc v in c t intv cc i th sense n-drive nc pgnd sgnd shutdown nc sense + ltc1148hv-5 1 m f 1000pf r sense ** 0.1 w shutdown *l 100 m h 1/2 si4532 d1 mbrs140t3 1/2 si4532 + c in 100 m f 25v v in 5.2v to 18v + c out 220 m f 10v avx v out 5v/1a c c 3300pf r c 1k c t 390pf *coiltronics ctx100-4 kool m m core **krl sp-1/2-a1-0r100 ltc1148 ?f10 + figure 10. 5v/1a high efficiency regulator with extended input voltage range figure 11. high efficiency 5v to 3.3v/1a converter with extended input voltage range figure 12. high efficiency adjustable 3a regulator
17 ltc1148 ltc1148-3.3/ltc1148-5 typical applicatio s u 1 2 3 4 5 6 7 14 13 12 11 10 9 8 p-drive nc v in c t intv cc i th sense n-drive nc pgnd sgnd shutdown nc sense + ltc1148l-3.3 1 m f 1000pf r sense ** 0.05 w shutdown *l 25 m h mmsf5n02hd d1 mbrs140t3 mmsf3p02hd + c in 100 m f 20v v in 3.5v to 14v + c out 220 m f 10v 2 avx v out 3.3v/2a c c 3300pf r c 1k c t 270pf *coiltronics ctx25-5 kool m m core **irc lr2512-01-r050-g ltc1148 ?f13 + figure 13. 5v input voltage, 3.3v/2a low dropout, high efficiency regulator 1 2 3 4 5 6 7 14 13 12 11 10 9 8 p-drive nc v in c t intv cc i th sense n-drive nc pgnd sgnd shutdown v fb sense + ltc1148 1 m f 1000pf r sense ** 0.05 w 1m *l 50 m h si4412dy d1 mbrs140t3 + v in 4v to 9v + c out 220 m f 10v 2 os-con v out 5v/1.4a c c 6800pf r c 1k c t 560pf ltc1148 ?f14 10nf si4431dy c in 220 m f 20v r1 25k 1% r2 75k 1% 200pf tp0610l v in : active 0v: shutdown *coiltronics ctx50-2-mp **krl sl-1-c1-0r050j + figure 14. 4v to 9v input voltage to C 5v/1a regulator
18 ltc1148 ltc1148-3.3/ltc1148-5 typical applicatio s u 1 2 3 4 5 6 7 14 13 12 11 10 9 8 p-drive nc v in c t intv cc i th sense n-drive nc pgnd sgnd shutdown nc sense + ltc1148-3.3 0.1 m f 1000pf r sense ** 0.02 w shutdown *l 10 m h si9804dy d1 mbrs140t3 si9803dy + c in 100 m f 20v 2 v in 5v + c out 220 m f 10v avx 2 v out 3.3v/4.5a c c 3300pf r c 470 w c t 270pf npo *coiltronics ctx10-5p **krl sp-1-c1-0r020 ltc1148 ?f15 figure 15. high efficiency 5v to 3.3v/4.5a converter 1 2 3 4 5 6 7 14 13 12 11 10 9 8 p-drive nc v in c t intv cc i th sense n-drive nc pgnd sgnd shutdown v fb sense + ltc1148 1 m f 0.1 m f r sense ** 0.082 w shutdown l2 50 m h + v in 4v to 14v v out 5v/1a c c 3300pf r c 1k c t 390pf ltc1148 ?f16 si4435dy c in 100 m f 20v 100pf + 220 m f* 10v os-con d1 mbrs140t3 r1 25k 1% r2 75k 1% + c out 220 m f 10v os-con l1 50 m h *low esr required **krl np-1a-c1-0r082j si4412dy v out 1n4148 + figure 16. 4v to 14v input voltage to 5v/1a regulator with current foldback
19 ltc1148 ltc1148-3.3/ltc1148-5 typical applicatio s u information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. s14 0695 1 2 3 4 0.150 ?0.157** (3.810 ?3.988) 14 13 0.337 ?0.344* (8.560 ?8.738) 0.228 ?0.244 (5.791 ?6.197) 12 11 10 9 5 6 7 8 0.016 ?0.050 0.406 ?1.270 0.010 ?0.020 (0.254 ?0.508) 45 0 ?8 typ 0.008 ?0.010 (0.203 ?0.254) 0.053 ?0.069 (1.346 ?1.752) 0.014 ?0.019 (0.355 ?0.483) 0.004 ?0.010 (0.101 ?0.254) 0.050 (1.270) typ dimension does not include mold flash. mold flash shall not exceed 0.006" (0.152mm) per side dimension does not include interlead flash. interlead flash shall not exceed 0.010" (0.254mm) per side * ** 1 2 3 4 5 6 7 14 13 12 11 10 9 8 p-drive nc v in c t intv cc i th sense n-drive nc pgnd sgnd shutdown v fb sense + ltc1148 1 m f 1000pf r sense ** 0.05 w shutdown *l 50 m h nds9410a d1 mbrs140t3 + v in 5.2v to 14v + c out 220 m f 10v 2 os-con v out 3.3v/2a or 5v/2a c c 3300pf r c 1k c t 390pf *coiltronics ctx50-2-mp **krl sl-1-c1-0r050r ltc1148 ?f17 10nf nds9435a c in 100 m f 20v 100pf r1b 43k 1% r2 56k 1% r1a 33k 1% vn2222ll 0v: v out = 3.3v 5v: v out = 5v + figure 17. logic selectable 5v/1a or 3.3v/1a high efficiency regulator n14 1197 0.255 0.015* (6.477 0.381) 0.770* (19.558) max 3 1 2 4 5 6 7 8 9 10 11 12 13 14 0.020 (0.508) min 0.125 (3.175) min 0.130 0.005 (3.302 0.127) 0.045 ?0.065 (1.143 ?1.651) 0.065 (1.651) typ 0.018 0.003 (0.457 0.076) 0.100 0.010 (2.540 0.254) 0.005 (0.125) min 0.009 ?0.015 (0.229 ?0.381) 0.300 ?0.325 (7.620 ?8.255) 0.325 +0.035 0.015 +0.889 0.381 8.255 () *these dimensions do not include mold flash or protrusions. mold flash or protrusions shall not exceed 0.010 inch (0.254mm) s package 14-lead plastic small outline (narrow 0.150) (ltc dwg # 05-08-1610) n package 14-lead pdip (narrow 0.300) (ltc dwg # 05-08-1510) package descriptio u dimensions in inches (millimeters) unless otherwise noted.
20 ltc1148 ltc1148-3.3/ltc1148-5 ? linear technology corporation 1993 114835fc lt/gp 1098 2k rev c ? printed in usa typical applicatio n u linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 l fax: (408) 434-0507 l www.linear-tech.com 1 2 3 4 5 6 7 14 13 12 11 10 9 8 p-drive nc v in c t intv cc i th sense n-drive nc pgnd sgnd shutdown nc sense + ltc1148hv-5 1 m f 1000pf r sense ** 0.01 w shutdown *l 33 m h n-ch irfz44 d1 1n5818 vn2222ll + c in 2700 m f 35v 2 v in 10v to 18v + c out 2200 m f 16v 3 v out 5v/8a c c 3300pf r c 510 w c t 820pf ltc1148 ?f18 mur110 n-ch irfz44 470nf 220 w 220 w 20k 1n4148 22k 100 w 100 w *coiltronics ctx33-10-km **dale lvr-3-0.01 2n3906 2n2222 + figure 18. all n-channel 5v/8a high efficiency regulator (burst mode operation suppressed) figure 19. all n-channel 5v/8a efficiency load current (a) 0.1 60 efficiency (%) 70 80 100 110 ltc1148 ?f19 90 v in = 10v v in = 14v related parts part number description comments ltc1142 dual high efficiency synchronous step-down switching regulator dual ltc1148 ltc1143 dual high efficiency step-down switching regulator controller nonsynchronous dual output ltc1147 high efficiency step-down switching regulator controller nonsynchronous equivalent to ltc1148, 8-pin ltc1149 high efficiency synchronous step-down switching regulator v in < 48v, standard threshold mosfets ltc1159 high efficiency synchronous step-down switching regulator v in < 40v, logic level mosfets ltc1174 high efficiency step-down and inverting dc/dc converter nonsynchronous 8-pin internal switch ltc1265 1.2a, high efficiency step-down dc/dc converter nonsynchronous internal switch ltc1435a high efficiency low noise synchronous step-down switching regulator synchronous n-channel, constant frequency ltc1538-aux dual high efficiency, low noise, synchronous step-down auxiliary linear regulator, 5v standby in shutdown switching regulator for additional high efficiency application circuits, see application notes 54, 58 and 66

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